FIG. 1 shows a current mirror circuit according to the prior art. The current mirror circuit according to the prior art, as is illustrated in FIG. 1, serves the purpose of converting an input current Iin into an output current Iout at a certain mirror ratio. If the potential is at the same level at the two nodes KA, KB, the current ratio between the input current Iin and the mirrored output current Iout is determined by the ratio of the resistance values of the two resistors RA, RB:
                    I        in                    I        out              =                  R        B                    R        A              ,where RA≠RB.
However, this only applies if the two internal operating currents I0 which are produced by two current sources are small enough for them to be negligible compared to the input current Iin and the mirrored output current Iout. The current mirror circuit shown in FIG. 1 and according to the prior art therefore has the disadvantage that, owing to the internal operating currents I0 which are not negligibly small, an error occurs in the current mirroring.
An obvious way of avoiding this disadvantage is a current compensation circuit, as illustrated in FIG. 2. The current mirror circuit shown in FIG. 2 has two further internal current sources which produce currents I0. The current compensation current sources compensate for the current error which occurs in the conventional current mirror circuit illustrated in FIG. 1.
The disadvantage of the current mirror circuit illustrated in FIG. 2 consists in the fact that additional current compensation sources need to be provided for the purpose of producing the compensation currents I0. Overall, the current mirror circuit shown in FIG. 2 can only be implemented in a relatively complex manner in terms of circuitry.
A further disadvantage of the circuit illustrated in FIG. 2 consists in the fact that the current compensation sources require relatively high saturation voltages, i.e. the voltage drops across the resistors RA, RB need to be large. As a result, the power loss increases, and the supply voltage VDD is higher.